[PATCH v10] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller
Bharat Kumar Gogada
bharat.kumar.gogada at xilinx.com
Sat Nov 28 01:59:19 PST 2015
> Subject: Re: [PATCH v10] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL
> PCIe Host Controller
>
> On Friday 27 November 2015 20:32:03 Bharat Kumar Gogada wrote:
> > + do {
> > + err = nwl_pcie_link_up(pcie, PHY_RDY_LINKUP);
> > + if (err != 1) {
> > + check_link_up++;
> > + if (check_link_up > LINKUP_ITER_CHECK)
> > + return -ENODEV;
> > + mdelay(1000);
> > + }
> > + } while (!err);
>
> mdelay(1000) is not something anyone should do. Why can't you call a
> sleeping function here?
>
Agreed will use sleep function, will address it in next patch.
Regards,
Bharat
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