[PATCH] clk: xgene: Fix divider with non-zero shift value

Stephen Boyd sboyd at codeaurora.org
Fri Nov 20 10:49:07 PST 2015

On 11/19, Loc Ho wrote:
> The X-Gene clock driver missed the divider shift operation when
> set the divider value.
> Signed-off-by: Loc Ho <lho at apm.com>

Applied to clk-next + 

Fixes: 308964caeebc ("clk: Add APM X-Gene SoC clock driver")

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