[PATCH v7 6/7] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

Stephen Boyd sboyd at codeaurora.org
Fri May 22 11:41:31 PDT 2015


On 05/22, Stephen Boyd wrote:
> On 05/22/15 11:30, Brent Wang wrote:
> > Hello Stephen,
> >
> > 2015-05-22 13:20 GMT+08:00 Bintian <bintian.wang at huawei.com>:
> >>
> >>>
> >>> Is pl011 the uart device? Does it have a node in DT somewhere? If it
> >>> does, then we could put the assigned-parents properties in that node so
> >>> that when the pl011 probes the uart1 clock has its parent set to
> >>> clk_150m. See the "Assigned clock parents and rates" section of
> >>> Documentation/devicetree/bindings/clock/clock-bindings.txt.
> >>>
> >> I will verify this.
> > Currently the "assigned-clock*" doesn't work for pl011 UART device
> > node, maybe we will
> > do some fix for its driver later or other modules.
> 
> Why doesn't it work?
> 

Does this patch help?

---8<----
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index f0099360039e..350ed93d4281 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -19,6 +19,7 @@
 #include <linux/amba/bus.h>
 #include <linux/sizes.h>
 #include <linux/limits.h>
+#include <linux/clk/clk-conf.h>
 
 #include <asm/irq.h>
 
@@ -237,6 +238,10 @@ static int amba_probe(struct device *dev)
 	int ret;
 
 	do {
+		ret = of_clk_set_defaults(dev->of_node, false);
+		if (ret < 0)
+			break;
+
 		ret = dev_pm_domain_attach(dev, true);
 		if (ret == -EPROBE_DEFER)
 			break;

-- 
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