[PATCH v2 0/2] PCI: designware: improve iATU programming and usage

Bjorn Helgaas bhelgaas at google.com
Tue May 19 16:21:55 PDT 2015


[-cc Mohit, +cc Pratyush]

On Tue, May 19, 2015 at 6:05 PM, Bjorn Helgaas <bhelgaas at google.com> wrote:
> [+cc Mohit]
>
> On Thu, Apr 30, 2015 at 04:22:27PM +0800, Jisheng Zhang wrote:
>> The outbound iATU programming functions are similar, so PATCH1 consolidates
>> them into one.
>>
>> Most transactions' type are cfg0 and MEM, so current iATU usage is not
>> balanced. PATCH2 adopts idea from Minghuan Lian <Minghuan.Lian at freescale.com>:
>>
>>  http://www.spinics.net/lists/linux-pci/msg40440.html
>>
>> to change the iATU allocation: iATU0 for cfg and IO, iATU1 for MEM.
>>
>> Changes since v1:
>> - remove outbound iATU programming for IO in dw_pcie_host_init, since it can
>>   be done by berlin_pcie_{rd|wr}_other_conf() latter.
>> - only do outbound iATU programming for MEM if pp->ops->rd_other_conf is not
>>   set. Thank Fabrice Gasnier to point out "some platforms doesn't have support
>>   for ATU"
>>
>> Jisheng Zhang (2):
>>   PCI: designware: consolidate outbound iATU programming functions
>>   PCI: designware: use iATU0 for cfg and IO, iATU1 for MEM
>>
>>  drivers/pci/host/pcie-designware.c | 142 ++++++++++++++++---------------------
>
> These need acks from Jingoo and/or Mohit.  Any opinions?

Oops, sorry, forgot about the recent addition of Pratyush.

Bjorn



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