[PATCH v3] pinctrl: sirf: add sirf atlas7 pinctrl and gpio support
linus.walleij at linaro.org
Tue May 19 06:59:59 PDT 2015
On Mon, May 18, 2015 at 9:28 AM, Barry Song <21cnbao at gmail.com> wrote:
> From: Wei Chen <Wei.Chen at csr.com>
> The Pinctrl module (ioc) controls the Pad's function select
> (each pad can have 8 functions), Pad's Drive Strength, Pad's
> Pull Select and Pad's Input Disable status.
> The ioc has two modules, ioc_top & ioc_rtc. Both of these two
> modules have function select/clear, Pull select and Drive
> Strength registers. But only ioc_rtc has input-disable
> registers. The Pads on ioc_top have to access ioc_rtc to set
> their input-disable status and intpu-disable-value.
> So have to use one ioc driver instance to drive these two
> ioc modules at the same time, and each ioc module will be
> treat as one bank on the "IOC Device".
> The GPIO Controller controls the GPIO status if the Pad has
> been config as GPIO by Pinctrl already. Includes the GPIO
> Input/output, Interrupt type, Interrupt Status, and Set/Get
> The GPIO pull up/down are controlled by Pinctrl.
> There are 7 GPIO Groups and splited into 3 MACROs in atlas7.
> The GPIO Groups in one MACRO share one GPIO controllers, each
> GPIO Group are treated as one GPIO bank.
> For example:
> In VDIFM macro, there is one GPIO Controller, it has 3 banks
> to control 3 gpio groups. Its gpio name space is from 0 to 95.
> The Device Tree can be written as following:
> gpio-ranges = <&pinctrl 0 0 0>,
> <&pinctrl 32 0 0>,
> <&pinctrl 64 0 0>;
> gpio-ranges-group-names = "gnss_gpio_grp",
> bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp".
> bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp".
> bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp".
> Signed-off-by: Wei Chen <Wei.Chen at csr.com>
> Signed-off-by: Barry Song <Baohua.Song at csr.com>
> -v3: use generic pinconf to replace self-defined APIs
Awesome job Barry, well done.
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