[Qemu-devel] [PATCH 6/6] target-arm/cpu.h: document why env->spsr exists
Greg Bellows
greg.bellows at linaro.org
Wed Mar 11 08:39:47 PDT 2015
On Wed, Feb 25, 2015 at 10:02 AM, Alex Bennée <alex.bennee at linaro.org> wrote:
> I was getting very confused about the duplication of state. Perhaps we
> should just get rid of env->spsr and use helpers that understand the
> banking?
>
> Signed-off-by: Alex Bennée <alex.bennee at linaro.org>
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 11845a6..d7fd13f 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -155,6 +155,11 @@ typedef struct CPUARMState {
> This contains all the other bits. Use cpsr_{read,write} to access
> the whole CPSR. */
> uint32_t uncached_cpsr;
> + /* The spsr is a alias for spsr_elN where N is the current
"an alias"
> + * exception level. It is provided for here so the TCG msr/mrs
remove "for here"
> + * implementation can access one register. Care needs to be taken
> + * to ensure the banked_spsr[] is also updated.
> + */
> uint32_t spsr;
>
> /* Banked registers. */
> --
> 2.3.0
>
>
Otherwise...
Reviewed-by: Greg Bellows <greg.bellows at linaro.org>
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