[BUG] ARM: socfpga: L2 cache init
dinguyen at opensource.altera.com
Wed Mar 4 10:37:26 PST 2015
On 03/04/2015 04:23 AM, Steffen Trumtrar wrote:
> On Wed, Feb 25, 2015 at 10:30:32AM -0600, Dinh Nguyen wrote:
>> On Wed, Feb 25, 2015 at 3:26 AM, Russell King - ARM Linux
>> <linux at arm.linux.org.uk> wrote:
>>> On Tue, Feb 24, 2015 at 05:55:05PM -0600, Dinh Nguyen wrote:
>>>> Do you have a recommendation on what should be done?
>>> Please try this:
>>> arch/arm/mach-socfpga/socfpga.c | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>> diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
>>> index 383d61e138af..f5e597c207b9 100644
>>> --- a/arch/arm/mach-socfpga/socfpga.c
>>> +++ b/arch/arm/mach-socfpga/socfpga.c
>>> @@ -23,6 +23,7 @@
>>> #include <asm/hardware/cache-l2x0.h>
>>> #include <asm/mach/arch.h>
>>> #include <asm/mach/map.h>
>>> +#include <asm/cacheflush.h>
>>> #include "core.h"
>>> @@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
>>> (u32 *) &socfpga_cpu1start_addr))
>>> pr_err("SMP: Need cpu1-start-addr in device tree.\n");
>>> + /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
>>> + smp_wmb();
>>> + sync_cache_w(&socfpga_cpu1start_addr);
>>> sys_manager_base_addr = of_iomap(np, 0);
>>> np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
>> Thanks Russell! I have been able to run the test for > 30 minutes now
>> with both cores coming up just fine.
>> Do you mind taking this patch for 4.0-rc? If so,
>> Tested-by: Dinh Nguyen <dinguyen at opensource.altera.com>
>> Steffen, if you don't mind, do you want to test on your setup as well?
> Looks good for me, too:
> Tested-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
Steffen, thanks for testing.
Russell, if you don't mind, I'll take this patch through my tree as I
have a couple of other fixes for 4.0-rc as well.
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