[RFC PATCH] arm64: cmpxchg.h: Bring ldxr and stxr closer

[Catalin Marinas]

On Tue, Mar 03, 2015 at 11:58:26AM -0500, Pranith Kumar wrote:
> On Tue, Mar 3, 2015 at 9:34 AM, Catalin Marinas <catalin.marinas at arm.com> wrote:
> > Do you mean the cmpxchg_double() change? Becuase %w0 and %0 is the same
> > physical register. You set it to 0 and immediately override it with
> > ldxp.
> 
> Thanks Catalin. I realized the blunder a while after Will pointed it
> out. The asm here was a bit confusing. %0 usually refers to the first
> input/output variable. But for ldxp instruction(which is just a
> double-word load, not exclusive), it refers to the physical registers.

OK, so please try not to touch any asm code until you understood (a) the
AArch64 instruction set and (b) the gcc inline assembly syntax ;).

> What about the changes in cmpxchg()? Why do we need to set %w0 to 0
> after the ldxrh instruction? Also, could you please point me to any
> arm64 asm reference?

"info gcc" for the inline assembly syntax and the ARMv8 ARM for the
description of the AArch64 instruction set. It also helps if you look at
the code generated by the compiler (e.g. objdump -d).

-- 
Catalin