EDAC on arm64

[Catalin Marinas]

On Mon, Mar 02, 2015 at 10:59:32AM +0000, Will Deacon wrote:
> On Sat, Feb 28, 2015 at 12:52:03AM +0000, Jon Masters wrote:
> > Have you considered reviving the patch you posted previously for EDAC
> > support (the atomic_scrub read/write test piece dependency)?
> > 
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/249039.html
> 
> Well, we'd need a way to handle the non-coherent DMA case and it's really
> not clear how to fix that.

I agree, that's where the discussions stopped. Basically the EDAC memory
writing is racy with any non-cacheable memory accesses (by CPU or
device). The only way we could safely use this is only if all the
devices are coherent *and* KVM is disabled. With KVM, guests may access
the memory uncached, so we hit the same problem.

-- 
Catalin