[PATCH] iommu/arm-smmu: Fix bug in ARM_SMMU_FEAT_TRANS_OPS condition check

Baptiste Reynal b.reynal at virtualopensystems.com
Tue Jun 23 05:12:42 PDT 2015


This issue has already been fixed here :
http://www.spinics.net/lists/arm-kernel/msg424824.html

Regards,
Baptiste

On Tue, Jun 23, 2015 at 2:07 PM, Sricharan R <sricharan at codeaurora.org> wrote:
> Patch 'fix ARM_SMMU_FEAT_TRANS_OPS condition' changed the check
> for ARM_SMMU_FEAT_TRANS_OPS to be based on presence of stage1 check,
> but used (id & ID0_ATOSNS) instead of !(id & ID0_ATOSNS).
> Fix it here.
>
> Signed-off-by: Sricharan R <sricharan at codeaurora.org>
> ---
>  drivers/iommu/arm-smmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 09091e9..fbf4af6 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -1866,7 +1866,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
>                 return -ENODEV;
>         }
>
> -       if ((id & ID0_S1TS) && ((smmu->version == 1) || (id & ID0_ATOSNS))) {
> +       if ((id & ID0_S1TS) && ((smmu->version == 1) || !(id & ID0_ATOSNS))) {
>                 smmu->features |= ARM_SMMU_FEAT_TRANS_OPS;
>                 dev_notice(smmu->dev, "\taddress translation ops\n");
>         }
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
>



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