[PATCH v4 00/14] crypto: add a new driver for Marvell's CESA
boris.brezillon at free-electrons.com
Thu Jun 11 13:14:54 PDT 2015
Sorry for the noise: apparently I forgot to remove existing patches
when regenerating the series with format-patch.
I'll resend the series tomorrow.
On Thu, 11 Jun 2015 19:36:19 +0200
Boris Brezillon <boris.brezillon at free-electrons.com> wrote:
> This patch series adds a new driver supporting Marvell's CESA IP.
> This driver addresses some limitations of the existing one.
> From a performance and CPU load point of view the most important
> limitation in the existing driver is the lack of DMA support, thus
> preventing us from chaining crypto operations.
> I know we usually try to adapt existing drivers instead of replacing them
> by new ones, but after trying to refactor the mv_cesa driver I realized it
> would take longer than writing an new one from scratch.
> Here are the main features brought by this new driver:
> - support for armada SoCs (up to 38x) while keeping support for older ones
> (Orion and Kirkwood). Note that old DT bindings (those used on Orion and
> Kirkwood platforms) are supported, or IOTW, old DTs are compatible with
> this new driver.
> - DMA mode to offload the CPU in case of intensive crypto usage
> - new algorithms: SHA256, DES and 3DES
> I'd like to thank Arnaud, who has carefully reviewed several iterations of
> this driver, helped me improved my implementation, provided support for
> several crypto algorithms, provided support for armada-370 and tested
> the driver on different platforms, hence the SoB and dual MODULE_AUTHOR
> in the driver code.
> In this version I dropped the DT changes, but you'll find them in my
> cesa-v4 branch . In this branch you'll find everything you need to
> test on all Marvell platforms (including the old ones).
> I'll post a series updating all the DTs once this driver has been merged.
> Best Regards,
> Changes since v3:
> - add import functions for hash algorithms
> - patch mv_cesa driver to support the new DT bindings
> - few fixes in the documentation
> - replace mv_mbus_dram_info() call by mv_mbus_dram_info_nooverlap()
> - remove DT updates from the series
> Changes since v2:
> - fixes in the cipher code (->dst_nents was assigned the ->src_nents
> value and CBC state was overwritten by the IV after each chunk
> Arnaud Ebalard (4):
> crypto: marvell/CESA: add Triple-DES support
> crypto: marvell/CESA: add MD5 support
> crypto: marvell/CESA: add SHA256 support
> crypto: marvell/CESA: add support for Kirkwood and Dove SoCs
> Boris Brezillon (10):
> crypto: mv_cesa: document the clocks property
> crypto: mv_cesa: use gen_pool to reserve the SRAM memory region
> crypto: mv_cesa: explicitly define kirkwood and dove compatible
> crypto: add a new driver for Marvell's CESA
> crypto: marvell/CESA: add TDMA support
> crypto: marvell/CESA: add DES support
> crypto: marvell/CESA: add support for all armada SoCs
> crypto: marvell/CESA: add allhwsupport module parameter
> crypto: marvell/CESA: add support for Orion SoCs
> crypto: marvell/CESA: add DT bindings documentation
> .../devicetree/bindings/crypto/marvell-cesa.txt | 45 +
> .../devicetree/bindings/crypto/mv_cesa.txt | 31 +-
> drivers/crypto/Kconfig | 18 +
> drivers/crypto/Makefile | 1 +
> drivers/crypto/marvell/Makefile | 2 +
> drivers/crypto/marvell/cesa.c | 544 ++++++++
> drivers/crypto/marvell/cesa.h | 804 +++++++++++
> drivers/crypto/marvell/cipher.c | 774 +++++++++++
> drivers/crypto/marvell/hash.c | 1433 ++++++++++++++++++++
> drivers/crypto/marvell/tdma.c | 224 +++
> drivers/crypto/mv_cesa.c | 60 +-
> 11 files changed, 3912 insertions(+), 24 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/crypto/marvell-cesa.txt
> create mode 100644 drivers/crypto/marvell/Makefile
> create mode 100644 drivers/crypto/marvell/cesa.c
> create mode 100644 drivers/crypto/marvell/cesa.h
> create mode 100644 drivers/crypto/marvell/cipher.c
> create mode 100644 drivers/crypto/marvell/hash.c
> create mode 100644 drivers/crypto/marvell/tdma.c
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
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