[PATCH] ARM: mvebu: use DT properties to fine-tune the L2 configuration

[Thomas Petazzoni]

In order to optimize the L2 cache performance, this commit adjusts the
configuration of the L2 on the Cortex-A9 based Marvell EBU processors
(Armada 375, 38x and 39x), using the appropriate DT properties.

We enable double linefill, incr double linefill, data prefetch and
disable double linefill on wrap. This matches the configuration that
was fine tuned in the Marvell BSP.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
---
Enabling the data prefetching depends on a patch from "Hauke Mehrtens
<hauke at hauke-m.de>", [PATCH v4] ARM: l2c: add options to overwrite
prefetching behavior, which has been applied by Russell (see
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8391/1)
but does not appear yet in his for-next branch.
---
 arch/arm/boot/dts/armada-375.dtsi | 4 ++++
 arch/arm/boot/dts/armada-38x.dtsi | 4 ++++
 arch/arm/boot/dts/armada-39x.dtsi | 4 ++++
 3 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index f076ff8..4d4964b 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -176,6 +176,10 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
+				arm,double-linefill-incr = <1>;
+				arm,double-linefill-wrap = <0>;
+				arm,double-linefill = <1>;
+				prefetch-data = <1>;
 			};
 
 			scu at c000 {
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 218a2ac..a86d1dc 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -143,6 +143,10 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
+				arm,double-linefill-incr = <1>;
+				arm,double-linefill-wrap = <0>;
+				arm,double-linefill = <1>;
+				prefetch-data = <1>;
 			};
 
 			scu at c000 {
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index ecd1318..06d9cc5 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -104,6 +104,10 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
+				arm,double-linefill-incr = <1>;
+				arm,double-linefill-wrap = <0>;
+				arm,double-linefill = <1>;
+				prefetch-data = <1>;
 			};
 
 			scu at c000 {
-- 
2.1.0