[PATCH 15/34] pinctrl: mvebu: armada-39x: align NAND pin naming

Linus Walleij linus.walleij at linaro.org
Wed Jun 10 02:15:49 PDT 2015

On Tue, Jun 9, 2015 at 6:47 PM, Thomas Petazzoni
<thomas.petazzoni at free-electrons.com> wrote:

> All SoCs use "nand" to designate NAND pins, only Armada 39x is using
> "nd", which is not consistent. This commit fixes that by renaming the
> corresponding functions.
> It also changes the subnames from rbn0/rbn1 to rb0/rb1, to respect the
> convention used everywhere that we don't encode the 'n' part of signal
> names.
> While this commit changes the main name of function, therefore
> potentially breaking the DT compatibility, this is not a problem since
> Armada 39x is a brand new SoC which isn't used in production yet.
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>

Patch applied.

Linus Walleij

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