[linux-sunxi] Re: [PATCH v2 01/11] clk: sunxi: Add mod0 and mmc module clock support for A80

Chen-Yu Tsai wens at csie.org
Sun Jan 11 18:54:46 PST 2015

On Mon, Jan 12, 2015 at 10:39 AM, Chen-Yu Tsai <wens at csie.org> wrote:
> On Thu, Jan 8, 2015 at 5:38 PM, Maxime Ripard
> <maxime.ripard at free-electrons.com> wrote:
>> On Sat, Dec 20, 2014 at 08:43:27PM +0800, Chen-Yu Tsai wrote:
>>> > That looks a lot like the A10 MMC clock. What's changing? only the
>>> > data to feed to the factors setup code?
>>> That's correct. Only the mux width in the data fed to the setup code
>>> and the lock differ.
>>> The hardware can work with the a10 mod0 code, but it won't recover from
>>> cases where someone writes to the upper bits of the mux, since it doesn't
>>> know about them.
>> I'd very much prefer if we could factorise that code then.
> I was hoping to not have to extend sunxi-factors-clk any more. But yes,
> I can add mux_width and mux_table fields to factors_data.

OK. This was not what I meant to say at all. I've generalized
sun4i_a10_mmc_setup() in the next version.


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