[PATCH v7 10/16] ARM: tegra: Enable the DFLL on the Jetson TK1
Mikko Perttunen
mikko.perttunen at kapsi.fi
Thu Jan 8 05:22:13 PST 2015
From: Tuomas Tynkkynen <ttynkkynen at nvidia.com>
Add the board-specific properties of the DFLL for the Jetson TK1 board.
On this board, the DFLL will take control of the sd0 regulator on the
on-board AS3722 PMIC.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen at nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen at kapsi.fi>
---
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 4eb540b..f539990 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1509,7 +1509,7 @@
vin-ldo9-10-supply = <&vdd_5v0_sys>;
vin-ldo11-supply = <&vdd_3v3_run>;
- sd0 {
+ vdd_cpu: sd0 {
regulator-name = "+VDD_CPU_AP";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
@@ -1730,6 +1730,12 @@
non-removable;
};
+ dfll at 0,70110000 {
+ status = "okay";
+ vdd-cpu-supply = <&vdd_cpu>;
+ nvidia,i2c-fs-rate = <400000>;
+ };
+
ahub at 0,70300000 {
i2s at 0,70301100 {
status = "okay";
--
2.2.1
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