[PATCH 3/3] ARM: imx6: Fix procedure to switch the parent of LDB_DI_CLK

Shawn Guo shawn.guo at linaro.org
Thu Jan 8 05:00:08 PST 2015

On Tue, Jan 06, 2015 at 04:47:45PM +0100, Philipp Zabel wrote:
> From: Fabio Estevam <fabio.estevam at freescale.com>
> Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree,
> the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the
> ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is
> generated, and the LVDS display will hang when the ipu_di_clk is sourced from
> ldb_di_clk.
> To fix the problem, both the new and current parent of the ldb_di_clk should
> be disabled before the switch. This patch ensures that correct steps are
> followed when ldb_di_clk parent is switched in the beginning of boot. The
> glitchy muxes are then registered as read-only. The clock parent can be selected
> using the assigned-clocks and assigned-clock-parents properties of the ccm
> device tree node:
> 	&clks {
> 		assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> 				  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> 		assigned-clock-parents = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>,
> 					 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
> 	};
> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan at freescale.com>
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> Signed-off-by: Philipp Zabel <p.zabel at pengutronix.de>

Before I start reviewing the patch, I would like to know if there is a
formal errata for this issue, including the bug description, recommended
workaround, and affected i.MX6 variants etc.


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