[PATCH 1/6] ASoC: max98088: Document DT bindings
Javier Martinez Canillas
javier.martinez at collabora.co.uk
Mon Feb 23 08:46:17 PST 2015
On 02/20/2015 01:12 PM, Sylwester Nawrocki wrote:
> On 20/02/15 01:36, Andreas Färber wrote:
>>>> >> So it seems the mclk is not always set up properly by the kernel,
>>>> >> relying on firmware. Who's in charge of setting that clock up?
>>> > Right, it seems audio is only working due the firmware doing some previous
>>> > setup. Probably it works on every boot if you have "sound init" as a part of
>>> > the u-boot boot commands?
>> Indeed it does, 24 MHz without the reparenting patch, and sound working.
> You can have parent of the CLKOUT clock set by the clk core if it is
> specified in device tree in the PMU (the clkout clock supplier) device
> Similarly as we did for the Odroix U3:
> Relying on the clk_set_rate() to set the parent clock is not optimal
> IMO. Presumably you need to set select stable parent clock for clkout
> like XXTI. But I'm not very familiar with exyno5250 and that might be
> something different.
Thanks a lot for your suggestion. I'll drop Tushar's patch to allow
clkout to be reparent during set_rate then and change his DTS patch
to set a default parent for CLKOUT using "assigned-clock-parents".
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