16KB PAGE_SIZE not work on DB410C
Ard Biesheuvel
ard.biesheuvel at linaro.org
Thu Dec 31 01:05:25 PST 2015
On 25 December 2015 at 13:24, Pingbo Wen <pingbo.wen at linaro.org> wrote:
> Hi Ard
>
>> 在 2015年12月21日,15:06,Ard Biesheuvel <ard.biesheuvel at linaro.org> 写道:
>>
>> On 21 December 2015 at 05:00, Pingbo Wen <pingbo.wen at linaro.org> wrote:
>>> Hello,
>>>
>>> I want to do some tests over 16KB page size on dragonboard 410c. And I merged
>>> arm64-upstream branch over
>>>
>>> https://git.linaro.org/landing-teams/working/qualcomm/kernel.git integration-linux-qcomlt
>>>
>>> which is based on Linux Kernel 4.3.
>>>
>>> The db410c can boot into ubuntu in 4KB / 64KB page size, but when I set 16K page size, with
>>> 47bit VA, the kernel hang before kernel_start(), no log output.
>>>
>>> Does db410c support 16K page size? What can I do to boot it up?
>>>
>>
>> Cortex-A5x does not support 16 KB page size
>
> Is there any documents I can reference? As I have get from ARM document, the Cortex-A53 support 16k page size, and Cortex-A57 don’t. The document can be found at:
>
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABDJHAD.html
>
> Reference it here:
>
> The supported granule sizes are 4KB, 16KB, and 64KB, and it is implementation defined which of the three are supported. Code that creates page tables is able to read the system register ID_AA64MMFR0_EL1, to find out which are the supported sizes. The Cortex-A53 processor supports all three sizes, but this is not the case for early versions of some processors, such as the Cortex-A57, which did not support the 16K granule size. The size is configurable for each translation table within the Translation Control Register (TCR_EL1).
>
> Did I miss something?
>
Ah, apologies for sharing incorrect information. I was under the
impression that A53 does not support 16k pages either, but apparently
I was wrong.
So what does your ID_AA64MMFR0_EL1 register say?
More information about the linux-arm-kernel
mailing list