[PATCH V2 22/23] pci, acpi: Match PCI config space accessors against platfrom specific quirks.
Tomasz Nowicki
tn at semihalf.com
Tue Dec 22 02:20:02 PST 2015
On 21.12.2015 12:47, Gabriele Paoloni wrote:
> 2) In the quirk mechanism you proposed, I see that the callback function
> allows to do some preparation work for the host bridge. For example in
> Hisilicon hip05 case we would need to read some values from the ACPI
> table (see acpi_pci_root_hisi_add() function in
> https://lkml.org/lkml/2015/12/3/426).
> I am quite new to ACPI and I wonder if it is OK to add such "Packages"
> to the PCI host bridge ACPI device...or maybe we need to declare a new
> one...?
I may miss sth so please correct me in that case.
https://lkml.org/lkml/2015/12/3/426 shows that you need special handling
for root->secondary.start bus number only, right? So how about creating
special MCFG region <rc-base:rc-base+rc-size> only for <segment,bus>.
Like that:
[0008] Base Address : <rc-base>
[0002] Segment Group Number : <segment>
[0001] Start Bus Number : <root->secondary.start>
[0001] End Bus Number : <root->secondary.start>
[0004] Reserved : 00000000
static const struct dmi_system_id hisi_quirk[] = {
{
.ident = "HiSi...",
.matches = {
DMI_MATCH(<whatever you need to match your platform>),
},
},
{ }
};
static struct pci_ops hisi_ecam_pci_ops = {
.map_bus = pci_mcfg_dev_base,
.read = hisi_pcie_cfg_read,
.write = hisi_pcie_cfg_write,
};
DECLARE_ACPI_MCFG_FIXUP(hisi_quirk, &hisi_ecam_pci_ops,
<segment>, <bus>);
With above code you can use your custom PCI config accessor only for
that region.
Let me know if that is not enough for you.
Tomasz
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