[PATCH] ARM: Set proper TEXT_OFFSET for IPQ806x

[Varadarajan Narayanan]

On Thu, Aug 20, 2015 at 08:54:55PM +0100, Russell King - ARM Linux wrote:
> On Thu, Aug 20, 2015 at 12:20:10PM -0500, Andy Gross wrote:
> > On Thu, Aug 20, 2015 at 02:00:06PM +0100, Russell King - ARM Linux wrote:
> > > On Thu, Aug 20, 2015 at 05:45:41PM +0530, Varadarajan Narayanan wrote:
> > > > RAM starts at 0x40000000 for IPQ. The lower 21MB of RAM is used
> > > > for Shared Memory and the kernel can start from 0x41500000.
> > >
> > > Why do people keep creating crap like this?  Each time something like
> > > this is created, it means that you _need_ to have a special kernel for
> > > your platform and you can't be part of the single zImage.
> > >
> > > Please, rather than creating crap like this, find a better way.
> >
> > In the case of the IPQ, we don't use the zImage because the decompress
> > requires a larger jump than we can do on that platform.  Having this
> > change at least gets us back 2MB of memory.
>
> Your argument about "a larger jump" makes no sense what so ever.  The
> branches between the decompressor and the main kernel are all done
> using a mov, which can jump to any 32-bit address.
>
> Even if you load the compressed kernel image at 0x41500000, the
> decompressor will mask that with 0xf8000000, and decide that RAM
> starts at 0x40000000.  It will then want to place the decompressed
> kernel image at 0x40008000.  Nothing there has anything to do with
> jump ranges.

With the qcom_defconfig, the kernel gets loaded at
0x40008000. This region is reserved for NSS.

> The only restriction that the ARM has as far as jump ranges are
> concerned is the 'b' or 'bl' instruction, which in ARM mode is
> limited to +/- 32MB.  That doesn't apply here since we don't use
> that to jump between the decompressor and the decompressed kernel
> image.
>
> So...
>
> Why is it necessary to have this 21MB block of shared memory at
> the start of RAM?  Why can't it be reserved by other means higher
> up in system memory?

The NSS subsystem needs memory to be reserved at 0x40000000.
The Ubi32 cores (part of NSS) need low address memory close
to the Ubi32 address space to do short calls from what is
called Ubi32 On Chip Memory to DDR and back again.  Since
there isn't a way to circumvent this restriction had to
reserve at 0x40000000.

-Varada

> It's up to the submitter to justify why any change is required, and
> in this case, part of that justification is why the shared memory is
> placed at the start of RAM, and why you need to be different from
> almost everyone else, and why you need to be a special case.  The
> justification also must make sense.
>
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