Programming the boundary between Inner and Outer caches on ARM architecture

[Russell King - ARM Linux]

On Thu, Apr 23, 2015 at 12:12:34AM +0530, Bhaskara rao Budiredla wrote:
> I am not sure why those are different. During Linux kernel
> booting, I wrote a function to read the contents of NMRR in
> build_mem_type_table( ) function. May be I need to sync up with boot
> loader folks to check why those are set up with different cacheable
> attributes. This difference was the reason to start this thread.

NMRR is set by the Linux kernel.  Anything that the boot loader does is
overwritten during the very early kernel boot.

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