[PATCH 5/7] ARM: cache-v7: optimise test for Cortex A9 r0pX devices

[Catalin Marinas]

On Fri, Apr 03, 2015 at 11:54:37AM +0100, Russell King wrote:
> Eliminate one unnecessary instruction from this test by pre-shifting
> the Cortex A9 ID - we can shift the actual ID in the teq instruction
> thereby losing the pX bit of the ID at no cost.
> 
> Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>