[GIT PULL] qcom SoC changes for v4.1

[Andy Gross]

On Thu, Apr 02, 2015 at 12:43:50PM -0700, Stephen Boyd wrote:
> On 04/02/15 12:25, Kumar Gala wrote:
> > On Apr 2, 2015, at 3:37 AM, Nicolas Dechesne <nicolas.dechesne at linaro.org> wrote:
> >
> >> Andy, Kumar,
> >>
> >> On Mon, Mar 16, 2015 at 10:03 PM, Kumar Gala <galak at codeaurora.org> wrote:
> >>> Andy Gross (1):
> >>>      soc: qcom: gsbi: Add support for ADM CRCI muxing
> >> this commit seems to break the boot on IFC6410, it was initially
> >> reported on kernelci.org, see report and bootlog [1].
> >>
> >> running git bisect led me to:
> >>
> >> e5fdad68d47ed344832b7ca4e18b2e9708d8141e is the first bad commit
> >> commit e5fdad68d47ed344832b7ca4e18b2e9708d8141e
> >> Author: Andy Gross <agross at codeaurora.org>
> >> Date:   Mon Feb 9 16:01:06 2015 -0600
> >>
> >>    soc: qcom: gsbi: Add support for ADM CRCI muxing
> >>
> >>    This patch adds automatic configuration for the ADM CRCI muxing required to
> >>    support DMA operations for GSBI clients.  The GSBI mode and
> >> instance determine
> >>    the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
> >>    works properly.
> >>
> >>    Signed-off-by: Andy Gross <agross at codeaurora.org>
> >>    Signed-off-by: Kumar Gala <galak at codeaurora.org>
> >>
> >>
> >> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
> > I think we need to associated DT updates.
> >
> >
> 
> What about this patch squashed on top? Just guessing but I suspect we
> don't care about cell-index if we're not doing the tcsr stuff. Also, I
> imagine we could get rid of cell-index entirely if we matched against
> the address of the gsbi instead.

Except that the GSBI5 base address changes from chip to chip.


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