Reading twd_base at run-time

[Mason]

On 01/04/2015 14:28, Marc Zyngier wrote:

> It is worth mentioning that PERIPH_BASE is *not* an architected
> register, so an implementation is perfectly allowed not to implement it.
> Even on Cortex A9, a UP implementation will report PERIPH_BASE as zero.
> It is still likely to have a TWD though.

It is interesting that you would mention TWD and UP implementations,
because "config HAVE_ARM_TWD" depends on SMP, as I mentioned in a
separate thread ("Dropping "depends on SMP" for HAVE_ARM_TWD").

Would it make sense to drop the dependency?

I have a single-core Cortex A9 MPcore system where I want to use
the local timers. If it's too much trouble changing the build
options, I suppose I can just run an SMP kernel?

Regards.