[PATCH v6 4/4] thermal: Add Tegra SOCTHERM thermal management driver
Peter De Schrijver
pdeschrijver at nvidia.com
Mon Sep 29 01:14:03 PDT 2014
> >
> >>+struct tegra_tsensor_configuration {
> >>+ u32 tall, tsample, tiddq_en, ten_count;
> >>+ u32 pdiv, tsample_ate, pdiv_ate;
> >
> >What's the significance of the "ate" suffix?
>
> Again, no idea.
I presume it's Automated Test Equipment refering to the device to test silicon
coming back from the fab.
Cheers,
Peter.
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