[GIT PULL] arm/arm64: KVM: Fix unaligned access bug on gicv2 access

[Peter Maydell]

On 23 September 2014 14:52, Christoffer Dall
<christoffer.dall at linaro.org> wrote:
> If anyone feels like reviewing my patch and giving it a quick test on a
> BE system with a version of QEMU with the pl011 level-triggered patch,

FWIW, any old version of QEMU running the vexpress-a15 model
will also use level-triggered interrupts for pl011, because
the upstream DTB which we use for that board has always
correctly marked the pl011 and all the other motherboard
devices as being level-triggered.

I'm still not 100% convinced we shouldn't mark the
virtio-mmio devices as level-triggered, incidentally.
I *think* that (a) the spec pretty heavily implies that
the lines behave as level triggered but (b) the
specific text in the spec about required guest code
to avoid races (s.2.4.2 of the 0.9.5 spec) means that
even if the interrupt controller treats them as edge
triggered it's OK.

-- PMM