[PATCH v6 4/4] phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800
gautam.vivek at samsung.com
Wed Sep 10 20:20:30 PDT 2014
On Thursday, September 11, 2014 1:52 AM, "Julius Werner"
<jwerner at google.com> wrote
>>> right, use that to call phy_init() at the right time, then you need to
>>> add a new ->calibrate() method which, likely, will only be used by you
>> so you mean, the xhci should itself call phy_init() at a time suitable,
>> so that ->calibrate() is not required at all ?
> I'm not sure if that's a good idea because it would require phy_init()
> and calibrate() to always mean the same thing. The calibrate() for
> Exynos5420 needs to be called both during boot and after system
> resume, but there might be other platforms that don't want to
> completely shutdown and reinit their PHYs during suspend/resume with
> the same functions used for boot. For example, Tegra5 (proposed driver
> at http://www.spinics.net/lists/linux-usb/msg113093.html) can
> power-gate the PHY during suspend, but that's not running the same
> code as in the phy_init()/phy_shutdown() methods (the posted patch
> doesn't contain all power-gating code yet, but you can get an idea
> about how it has to work from
> It would also mean that the initial phy_init() call must always come
> after the XHCI reset, and I am not sure if that would fit nicely with
> all platforms.
>> right, and what's more generic than adding the support for PHYs straight
>> into xHCI ?
> Well, if we are going to have a calibrate() method (as in "stuff the
> PHY does after every controller reset if it needs to"), we have to add
> it either to the XHCI stack or the USB core.
> I thought the USB core would be more generic, because in theory it's
> possible that e.g. an
> EHCI controller might have a similar requirement.
Atleast on Exynos systems I can see that unless PHY is initialized the
fails to reset. So taking a path wherein we initialize the PHYs after
is not going to help us generically across all controllers.
With XHCI though things are OK while resetting, and we can initialize the
after controller reset happens but here too DWC3 is already initializing the
for exynos systems too, so it may not be very wise to do that initialization
once again. Plus the PHY core prevents multiple initialization anyways.
> (Also, we have the gen_phy pointer in a USB core structure (struct
> usb_hcd), so I thought
> making this feature generic to the USB core and thus available to all
> kinds of host controllers would be more natural.)
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