[PATCH 3/5] drivers: uio: Add Xgene QMTM UIO driver
Ankit Jindal
ankit.jindal at linaro.org
Tue Sep 9 02:56:57 PDT 2014
The Applied Micro X-Gene SOC has on-chip QMTM (Queue manager
and Traffic manager) which is hardware based Queue or Ring
manager. This QMTM devices can be used in conjuction with
other devices such as DMA Engine, Ethernet, Security Engine,
etc to assign work to based on Queues or Rings.
This patch allows user space access to Xgene QMTM device.
Signed-off-by: Ankit Jindal <ankit.jindal at linaro.org>
Signed-off-by: Tushar Jagad <tushar.jagad at linaro.org>
---
drivers/uio/Kconfig | 8 ++
drivers/uio/Makefile | 1 +
drivers/uio/uio_xgene_qmtm.c | 289 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 298 insertions(+)
create mode 100644 drivers/uio/uio_xgene_qmtm.c
diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 5a90914..d9e46bd 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -135,4 +135,12 @@ config UIO_MF624
If you compile this as a module, it will be called uio_mf624.
+config UIO_XGENE_QMTM
+ tristate "Applied Micro Xgene QMTM driver"
+ depends on OF
+ help
+ Userspace I/O interface for the Xgene QMTM. The userspace part of
+ this driver will be available for download from the Applied Micro
+ web site (http://www.apm.com/).
+
endif
diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile
index d3218bd..633eaa0 100644
--- a/drivers/uio/Makefile
+++ b/drivers/uio/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_UIO_PCI_GENERIC) += uio_pci_generic.o
obj-$(CONFIG_UIO_NETX) += uio_netx.o
obj-$(CONFIG_UIO_PRUSS) += uio_pruss.o
obj-$(CONFIG_UIO_MF624) += uio_mf624.o
+obj-$(CONFIG_UIO_XGENE_QMTM) += uio_xgene_qmtm.o
diff --git a/drivers/uio/uio_xgene_qmtm.c b/drivers/uio/uio_xgene_qmtm.c
new file mode 100644
index 0000000..895a385
--- /dev/null
+++ b/drivers/uio/uio_xgene_qmtm.c
@@ -0,0 +1,289 @@
+/*
+ * Xgene Queue Manager Traffic Manager (QMTM) UIO driver (uio_xgene_qmtm)
+ *
+ * This driver exports QMTM CSRs, Fabric and memory for queues to user-space
+ *
+ * Copyright (C) 2014 Applied Micro - http://www.apm.com/
+ * Copyright (C) 2014 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/of_platform.h>
+
+#define DRV_NAME "qmtm_uio"
+#define DRV_VERSION "1.0"
+
+#define QMTM_CONFIG 0x00000004
+#define QMTM_SRST 0x0000c200
+#define QMTM_CLKEN 0x0000c208
+#define QMTM_CFG_MEM_RAM_SHUTDOWN 0x0000d070
+
+#define QMTM_DEFAULT_QSIZE 0x00010000
+
+struct uio_qmtm_dev {
+ struct uio_info *info;
+ struct clk *qmtm_clk;
+};
+
+/* QMTM CSR read/write routine */
+static inline void qmtm_csr_write(struct uio_qmtm_dev *qmtm_dev, u32 offset,
+ u32 data)
+{
+ void __iomem *addr = (u8 *)qmtm_dev->info->mem[0].internal_addr +
+ offset;
+
+ writel(data, addr);
+}
+
+static inline u32 qmtm_csr_read(struct uio_qmtm_dev *qmtm_dev, u32 offset)
+{
+ void __iomem *addr = (u8 *)qmtm_dev->info->mem[0].internal_addr +
+ offset;
+
+ return readl(addr);
+}
+
+static int qmtm_reset(struct uio_qmtm_dev *qmtm_dev)
+{
+ u32 val;
+ int wait = 1000;
+
+ /* get device out of reset */
+ qmtm_csr_write(qmtm_dev, QMTM_CLKEN, 3);
+ qmtm_csr_write(qmtm_dev, QMTM_SRST, 3);
+ udelay(1000);
+ qmtm_csr_write(qmtm_dev, QMTM_SRST, 0);
+ qmtm_csr_write(qmtm_dev, QMTM_CFG_MEM_RAM_SHUTDOWN, 0);
+
+ /* check whether device is out of reset or not */
+ do {
+ val = qmtm_csr_read(qmtm_dev, QMTM_CFG_MEM_RAM_SHUTDOWN);
+
+ if (!wait--)
+ return -1;
+ udelay(1);
+ } while (val == 0xffffffff);
+
+ return 0;
+}
+
+static int qmtm_open(struct uio_info *info, struct inode *inode)
+{
+ struct uio_qmtm_dev *qmtm_dev = info->priv;
+
+ /* Enable QPcore */
+ qmtm_csr_write(qmtm_dev, QMTM_CONFIG, 0x80000000);
+
+ return 0;
+}
+
+static int qmtm_release(struct uio_info *info, struct inode *inode)
+{
+ struct uio_qmtm_dev *qmtm_dev = info->priv;
+
+ /* Disable QPcore */
+ qmtm_csr_write(qmtm_dev, QMTM_CONFIG, 0);
+
+ return 0;
+}
+
+static void qmtm_cleanup(struct platform_device *pdev,
+ struct uio_qmtm_dev *qmtm_dev)
+{
+ struct uio_info *info = qmtm_dev->info;
+
+ uio_unregister_device(info);
+
+ kfree(info->name);
+
+ if (!IS_ERR(info->mem[0].internal_addr))
+ devm_iounmap(&pdev->dev, info->mem[0].internal_addr);
+
+ kfree(info);
+ clk_put(qmtm_dev->qmtm_clk);
+ kfree(qmtm_dev);
+}
+
+static int qmtm_probe(struct platform_device *pdev)
+{
+ struct uio_info *info;
+ struct uio_qmtm_dev *qmtm_dev;
+ struct resource *csr;
+ struct resource *fabric;
+ struct resource *qpool;
+ unsigned int num_queues;
+ unsigned int devid;
+ int ret = -ENODEV;
+
+ qmtm_dev = kzalloc(sizeof(struct uio_qmtm_dev), GFP_KERNEL);
+ if (!qmtm_dev)
+ return -ENOMEM;
+
+ qmtm_dev->info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!qmtm_dev->info) {
+ kfree(qmtm_dev);
+ return -ENOMEM;
+ }
+
+ /* Power on qmtm in case its not done as part of boot-loader */
+ qmtm_dev->qmtm_clk = clk_get(&pdev->dev, NULL);
+ if (IS_ERR(qmtm_dev->qmtm_clk)) {
+ dev_err(&pdev->dev, "Failed to get clock\n");
+ ret = PTR_ERR(qmtm_dev->qmtm_clk);
+ kfree(qmtm_dev->info);
+ kfree(qmtm_dev);
+ return ret;
+ } else {
+ clk_prepare_enable(qmtm_dev->qmtm_clk);
+ }
+
+ csr = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!csr) {
+ dev_err(&pdev->dev, "No QMTM CSR resource specified\n");
+ goto out_free;
+ }
+
+ if (!csr->start) {
+ dev_err(&pdev->dev, "Invalid CSR resource\n");
+ goto out_free;
+ }
+
+ fabric = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!fabric) {
+ dev_err(&pdev->dev, "No QMTM Fabric resource specified\n");
+ goto out_free;
+ }
+
+ if (!fabric->start) {
+ dev_err(&pdev->dev, "Invalid Fabric resource\n");
+ goto out_free;
+ }
+
+ qpool = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ if (!qpool) {
+ dev_err(&pdev->dev, "No QMTM Qpool resource specified\n");
+ goto out_free;
+ }
+
+ if (!qpool->start) {
+ dev_err(&pdev->dev, "Invalid Qpool resource\n");
+ goto out_free;
+ }
+
+ ret = of_property_read_u32(pdev->dev.of_node, "num_queues",
+ &num_queues);
+
+ if (ret < 0) {
+ dev_err(&pdev->dev, "No num_queues resource specified\n");
+ goto out_free;
+ }
+
+ /* check whether sufficient memory is provided for the given queues */
+ if (!((num_queues * QMTM_DEFAULT_QSIZE) <= resource_size(qpool))) {
+ dev_err(&pdev->dev, "Insufficient Qpool for the given queues\n");
+ goto out_free;
+ }
+
+ ret = of_property_read_u32(pdev->dev.of_node, "devid", &devid);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "No devid resource specified\n");
+ goto out_free;
+ }
+
+ info = qmtm_dev->info;
+ info->mem[0].name = "csr";
+ info->mem[0].addr = csr->start;
+ info->mem[0].size = resource_size(csr);
+ info->mem[0].memtype = UIO_MEM_PHYS;
+ info->mem[0].internal_addr = devm_ioremap_resource(&pdev->dev, csr);
+
+ if (IS_ERR(info->mem[0].internal_addr)) {
+ dev_err(&pdev->dev, "Failed to ioremap CSR region\n");
+ goto out_free;
+ }
+
+ info->mem[1].name = "fabric";
+ info->mem[1].addr = fabric->start;
+ info->mem[1].size = resource_size(fabric);
+ info->mem[1].memtype = UIO_MEM_PHYS;
+
+ info->mem[2].name = "qpool";
+ info->mem[2].addr = qpool->start;
+ info->mem[2].size = resource_size(qpool);
+ info->mem[2].memtype = UIO_MEM_PHYS_CACHE;
+
+ info->name = kasprintf(GFP_KERNEL, "qmtm%d", devid);
+ info->version = DRV_VERSION;
+
+ info->priv = qmtm_dev;
+ info->open = qmtm_open;
+ info->release = qmtm_release;
+
+ /* get the qmtm out of reset */
+ ret = qmtm_reset(qmtm_dev);
+ if (ret < 0)
+ goto out_free;
+
+ /* register with uio framework */
+ ret = uio_register_device(&pdev->dev, info);
+ if (ret < 0)
+ goto out_free;
+
+ dev_info(&pdev->dev, "%s registered as UIO device.\n", info->name);
+
+ platform_set_drvdata(pdev, qmtm_dev);
+ return 0;
+
+out_free:
+ qmtm_cleanup(pdev, qmtm_dev);
+ return ret;
+}
+
+static int qmtm_remove(struct platform_device *pdev)
+{
+ struct uio_qmtm_dev *qmtm_dev = platform_get_drvdata(pdev);
+
+ qmtm_cleanup(pdev, qmtm_dev);
+ return 0;
+}
+
+static struct of_device_id qmtm_match[] = {
+ {.compatible = "apm,xgene-qmtm-uio",},
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, qmtm_match);
+
+static struct platform_driver qmtm_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = qmtm_match,
+ },
+ .probe = qmtm_probe,
+ .remove = qmtm_remove,
+};
+
+module_platform_driver(qmtm_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("Ankit Jindal <ankit.jindal at linaro.org>");
+MODULE_AUTHOR("Tushar Jagad <tushar.jagad at linaro.org>");
--
1.7.9.5
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