[PATCH/RFC] ARM: shmobile: r8a7791: Add SDHI clock rate to device tree
Simon Horman
horms+renesas at verge.net.au
Wed Oct 29 22:57:36 PDT 2014
From: Shinobu Uehara <shinobu.uehara.xc at renesas.com>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc at renesas.com>
[simon: rebase]
Signed-off-by: Simon Horman <horms+renesas at verge.net.au>
---
Based on the renesas-devel-20141030-v3.18-rc2 branch of my renesas tree
If this is useful I wonder if it is should be set in the koelsch and/or
henniger board DTS file instead of the r8a7791 DTSI SoC file.
arch/arm/boot/dts/r8a7791.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 9a57215..62745b8 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -416,6 +416,7 @@
reg = <0 0xee100000 0 0x200>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
+ renesas,clk-rate = <195000000>;
status = "disabled";
};
@@ -424,6 +425,7 @@
reg = <0 0xee140000 0 0x100>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
+ renesas,clk-rate = <97500000>;
status = "disabled";
};
@@ -432,6 +434,7 @@
reg = <0 0xee160000 0 0x100>;
interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
+ renesas,clk-rate = <97500000>;
status = "disabled";
};
--
2.1.1
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