[PATCH/RFC] ARM: shmobile: lager: Fix SPI mode of SPI-Flash into mode3

[Simon Horman]

From: Hisashi Nakamura <hisashi.nakamura.ak at renesas.com>

In order to change into mode3, CPOL and CPHA bit of SPCMD register
of MSIOF is changed. Mode3 can avoid intermediate voltage.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak at renesas.com>
Signed-off-by: Simon Horman <horms+renesas at verge.net.au>
---
Based on the renesas-devel-20141030-v3.18-rc2 branch of my renesas tree

 arch/arm/boot/dts/r8a7790-lager.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 830f2e8..1606fad 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -343,6 +343,8 @@
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		m25p,fast-read;
+		spi-cpol;
+		spi-cpha;
 
 		partition at 0 {
 			label = "loader";
-- 
2.1.1