[PATCH RFT 0/8] Marvell PXA168 libphy handling and Berlin Ethernet

[Sebastian Hesselbarth]

On 10/09/2014 06:57 PM, Florian Fainelli wrote:
> On 10/09/2014 08:24 AM, Sebastian Hesselbarth wrote:
>> Yeah, but that HW PHY stuff really only works properly with standard
>> compliant PHYs. In particular, the integrated Marvell PHY in Marvell
>> Berlin SoCs does not seem to reflect PHY status on BMCR properly /sigh/.
>> Anyway, I think we can live with PHY polling.
>>
>> BTW, one thing I noticed here is that libphy calls adjust_link
>> over-and-over again although nothing has changed. I guess we can just
>> add some before/after comparison in the libphy state machine and only
>> call adjust_link when something has changed. I'll have to look closer
>> at the state machine first and maybe Florian can comment on this,
>> too.
>
> There's basically nothing built in the generic libphy that would try to
> limit the number of times the adjust_link() callback is invoked, some
> changes went in the bcmgenet driver to avoid that, I have yet to see how
> much of this logic is transferable to the libphy layer.

Ok, thanks for the clarification. I guess for the final patch series,
I'll add a check for both registers modified in foo_adjust_link to bail
out if there is no change. That will save the two register writes per
second or so and also allow to phy_print_status() after the writels.

Sebastian