[PATCH v3 1/3] Documentation: dt: add Altera L3 NIC bindings

[Steffen Trumtrar]

Documentation for the Altera L3 networked interconnect found on the
SoCFPGA architecture.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 .../devicetree/bindings/soc/socfpga/altr,l3-nic.txt       | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt

diff --git a/Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt b/Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt
new file mode 100644
index 000000000000..d9491f14eed3
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt
@@ -0,0 +1,15 @@
+Altera SOCFPGA L3 Network Interconnect
+--------------------------------------
+
+The L3 NIC provides access to Global Programmer View (GPV) registers for all
+AXI slaves and masters on the SoC.
+
+Required properties:
+- compatible : "altr,l3-nic"
+- reg : Should contain 1 register range (address and length)
+
+Example:
+	 gpv at ff800000 {
+		compatible = "altr,l3-nic";
+		reg = <0xff800000 0x100000>;
+	};
-- 
2.1.3