[PATCH v11 2/2] irqchip: gicv2m: Add DT bindings for GICv2m

[Marc Zyngier]

On 26/11/14 11:12, Mark Rutland wrote:
> On Tue, Nov 25, 2014 at 06:47:23PM +0000, Marc Zyngier wrote:
>> From: Suravee Suthikulpanit <Suravee.Suthikulpanit at amd.com>
>>
>> Update the GIC DT bindings to support GICv2m.
>>
>> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit at amd.com>
>> [maz: split DT patch from main driver, updated changelog]
>> Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
>> ---
>>  Documentation/devicetree/bindings/arm/gic.txt | 53 +++++++++++++++++++++++++++
>>  1 file changed, 53 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
>> index c7d2fa1..375147e 100644
>> --- a/Documentation/devicetree/bindings/arm/gic.txt
>> +++ b/Documentation/devicetree/bindings/arm/gic.txt
>> @@ -96,3 +96,56 @@ Example:
>>  		      <0x2c006000 0x2000>;
>>  		interrupts = <1 9 0xf04>;
>>  	};
>> +
>> +
>> +* GICv2m extension for MSI/MSI-x support (Optional)
>> +
>> +Certain revisions of GIC-400 supports MSI/MSI-x via V2M register frame(s).
>> +This is enabled by specifying v2m sub-node(s).
>> +
>> +Required properties:
>> +
>> +- compatible	    : The value here should contain "arm,gic-v2m-frame".
>> +
>> +- msi-controller    : Identifies the node as an MSI controller.
>> +
>> +- reg		    : GICv2m MSI interface register base and size
> 
> It would be worth having a note that ranges, #address-cells, and
> #size-cells are necessary in the GIC node to map this.

Makes sense. I'll queue a separate patch for this.

Thanks,

	M.
-- 
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