[PATCH 3.18-rc3 v9 2/5] irqchip: gic: Make gic_raise_softirq() FIQ-safe
daniel.thompson at linaro.org
Tue Nov 25 09:26:38 PST 2014
It is currently possible for FIQ handlers to re-enter gic_raise_softirq()
and lock up.
lock(x); <-- Lockup
Calling printk() from a FIQ handler can trigger this problem because
printk() raises an IPI when it needs to wake_up_klogd(). More generally,
IPIs are the only means for FIQ handlers to safely defer work to less
restrictive calling context so the function to raise them really needs
to be FIQ-safe.
This patch fixes the problem by converting the cpu_map_migration_lock
into a rwlock making it safe to re-enter the function.
Having made it safe to re-enter gic_raise_softirq() we no longer need to
mask interrupts during gic_raise_softirq() because the b.L migration is
always performed from task context.
Signed-off-by: Daniel Thompson <daniel.thompson at linaro.org>
Cc: Thomas Gleixner <tglx at linutronix.de>
Cc: Jason Cooper <jason at lakedaemon.net>
Cc: Russell King <linux at arm.linux.org.uk>
Cc: Marc Zyngier <marc.zyngier at arm.com>
drivers/irqchip/irq-gic.c | 26 +++++++++++++++++++-------
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index bb4bc20573ea..a53aa11e4f17 100644
@@ -75,8 +75,11 @@ static DEFINE_RAW_SPINLOCK(irq_controller_lock);
* This lock is used by the big.LITTLE migration code to ensure no
* IPIs can be pended on the old core after the map has been updated.
+ * This lock may be locked for reading from FIQ handlers and therefore
+ * must not be locked for writing when FIQs are enabled.
* The GIC mapping of CPU interfaces does not necessarily match
@@ -625,12 +628,20 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
+ * Raise the specified IPI on all cpus set in mask.
+ * This function is safe to call from all calling contexts, including
+ * FIQ handlers. It relies on read locks being multiply acquirable to
+ * avoid deadlocks when the function is re-entered at different
+ * exception levels.
static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
- unsigned long flags, map = 0;
+ unsigned long map = 0;
- raw_spin_lock_irqsave(&cpu_map_migration_lock, flags);
/* Convert our logical CPU mask into a physical one. */
@@ -645,7 +656,7 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
/* this always happens on GIC0 */
writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data) + GIC_DIST_SOFTINT);
- raw_spin_unlock_irqrestore(&cpu_map_migration_lock, flags);
@@ -693,7 +704,8 @@ int gic_get_cpu_id(unsigned int cpu)
* Migrate all peripheral interrupts with a target matching the current CPU
* to the interface corresponding to @new_cpu_id. The CPU interface mapping
* is also updated. Targets to other CPU interfaces are unchanged.
- * This must be called with IRQs locally disabled.
+ * This must be called from a task context and with IRQ and FIQ locally
+ * disabled.
void gic_migrate_target(unsigned int new_cpu_id)
@@ -724,9 +736,9 @@ void gic_migrate_target(unsigned int new_cpu_id)
* pending on the old cpu static. That means we can defer the
* migration until after we have released the irq_controller_lock.
gic_cpu_map[cpu] = 1 << new_cpu_id;
* Find all the peripheral interrupts targetting the current
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