[RFC V6 2/3] arm:add bitrev.h file to support rbit instruction

Wang, Yalin Yalin.Wang at sonymobile.com
Thu Nov 13 18:01:34 PST 2014


> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Friday, November 14, 2014 7:53 AM
> To: Wang, Yalin
> > On Fri, Oct 31, 2014 at 01:42:44PM +0800, Wang, Yalin wrote:
> > This patch add bitrev.h file to support rbit instruction, so that we
> > can do bitrev operation by hardware.
> > Signed-off-by: Yalin Wang <yalin.wang at sonymobile.com>
> > ---
> >  arch/arm/Kconfig              |  1 +
> >  arch/arm/include/asm/bitrev.h | 21 +++++++++++++++++++++
> >  2 files changed, 22 insertions(+)
> >  create mode 100644 arch/arm/include/asm/bitrev.h
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > 89c4b5c..be92b3b 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -28,6 +28,7 @@ config ARM
> >  	select HANDLE_DOMAIN_IRQ
> >  	select HARDIRQS_SW_RESEND
> >  	select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
> > +	select HAVE_ARCH_BITREVERSE if (CPU_V7M || CPU_V7)
> 
> Looking at this, this is just wrong.  Take a moment to consider what
> happens if we build a kernel which supports both ARMv6 _and_ ARMv7 CPUs.
> What happens if an ARMv6 CPU tries to execute an rbit instruction?

Is it possible to build a kernel that support both CPU_V6 and CPU_V7?
I mean in Kconfig, CPU_V6 = y and CPU_V7 = y ?
If there is problem like you said,
How about this solution:
select HAVE_ARCH_BITREVERSE if ((CPU_V7M || CPU_V7) && !CPU_V6)  


> Second point (which isn't obvious from your submissions on-list) is that
> you've loaded the patch system up with patches for other parts of the
> kernel tree for which I am not responsible for.  As such, I can't take
> those patches without the sub-tree maintainer acking them.  Also, the
> commit text in those patches look weird:
> 
> 6fire: Convert byte_rev_table uses to bitrev8
> 
> Use the inline function instead of directly indexing the array.
> 
> This allows some architectures with hardware instructions for bit reversals
> to eliminate the array.
> 
> Signed-off-by: Joe Perches <(address hidden)>
> Signed-off-by: Yalin Wang <(address hidden)>
> 
> Why is Joe signing off on these patches?  As his is the first sign-off, one
> assumes that he was responsible for creating the patch in the first place,
> but there is no From: line marking him as the author.  Shouldn't his entry
> be an Acked-by: ?
> 
> Confused.
For this patch,
I just cherry-pick from Joe,
If you are not responsible for this part,
I will submit to the maintainers for these patches .
Sorry for that .




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