[PATCH v4] arm64: dts: exynos7: add support for cpuidle core power down

[Chander Kashyap]

On Fri, Nov 7, 2014 at 5:28 PM, Lorenzo Pieralisi
<lorenzo.pieralisi at arm.com> wrote:
> On Wed, Nov 05, 2014 at 01:15:31PM +0000, Chander Kashyap wrote:
>> Exynos7 has core power down state where cores can be powered off independently.
>
> "...has a core power down idle state..."
>
>> This patch adds support for this state.
>
> "...for this idle state."
>
>> Entry latency for the core power down is calculated as follows:
>> 1. Time difference is measured between cpuidle entry and exit.
>> 2. WFI is skipped for measuring the time.
>> 3. Select the worst case time in the set of 100000 cpuidle transactions,
>>    with varying load.
>>
>> Exit latency and target residency are supplied as per HW team
>
> "Exit latency and min residency values are supplied by the HW team."
>
> Target residency is a kernel naming scheme, non-existent in the idle state
> bindings.
>
> Please take time to write proper commit logs, thanks.
>
>> Signed-off-by: Chander Kashyap <k.chander at samsung.com>
>> ---
>> This patch has following dependencies:
>>       - [PATCH v5 0/8] arch: arm64: Enable support for Samsung Exynos7 SoC
>>               http://www.spinics.net/lists/linux-samsung-soc/msg37047.html
>> Changes in v2:
>>       - Moved the cpu-idle-state property after reg property
>>       - removed the status property.
>>
>> Changes in v3:
>>       - Added the Entry latency calculation in commit message.
>> Changes in v4:
>>       - Corrected the commit message.
>>       - Corrected the entry latency value.
>>
>>  arch/arm64/boot/dts/exynos/exynos7.dtsi |   17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>> index 50ae936..444dde1 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>> @@ -37,6 +37,7 @@
>>                       compatible = "arm,cortex-a57", "arm,armv8";
>>                       enable-method = "psci";
>
> enable-method should be after reg, it is not an ordering issues added
> by this patch but I still do not like that.

This is being taken care in new patch for Exynos7 support.

>
> Other than that, please take some time to rewrite the commit log and
> ask to fix the ordering above, you can add my:
>

Yes i will change as suggested.

Thanks for the review.

> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi at arm.com>
>
>>                       reg = <0x0>;
>> +                     cpu-idle-states = <&CPU_SLEEP>;
>>               };
>>
>>               cpu at 1 {
>> @@ -44,6 +45,7 @@
>>                       compatible = "arm,cortex-a57", "arm,armv8";
>>                       enable-method = "psci";
>>                       reg = <0x1>;
>> +                     cpu-idle-states = <&CPU_SLEEP>;
>>               };
>>
>>               cpu at 2 {
>> @@ -51,6 +53,7 @@
>>                       compatible = "arm,cortex-a57", "arm,armv8";
>>                       enable-method = "psci";
>>                       reg = <0x2>;
>> +                     cpu-idle-states = <&CPU_SLEEP>;
>>               };
>>
>>               cpu at 3 {
>> @@ -58,6 +61,20 @@
>>                       compatible = "arm,cortex-a57", "arm,armv8";
>>                       enable-method = "psci";
>>                       reg = <0x3>;
>> +                     cpu-idle-states = <&CPU_SLEEP>;
>> +             };
>> +
>> +             idle-states {
>> +                     entry-method = "arm,psci";
>> +
>> +                     CPU_SLEEP: cpu-sleep {
>> +                             compatible = "arm,idle-state";
>> +                             local-timer-stop;
>> +                             arm,psci-suspend-param = <0x0010000>;
>> +                             entry-latency-us = <34>;
>> +                             exit-latency-us = <150>;
>> +                             min-residency-us = <2100>;
>> +                     };
>>               };
>>       };
>>
>> --
>> 1.7.9.5
>>
>>
>
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