[PATCH 24/34] ARM: shmobile: lager: enable HS-USB
Simon Horman
horms+renesas at verge.net.au
Mon Nov 3 17:50:54 PST 2014
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh at renesas.com>
Enable HS-USB device for the Lager board, defining the GPIO that the driver
should check when probing. Since this board doesn't have the OTG ID pin, we
assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is
in position 2-3 (meaning USB function) and 0 in other positions.
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh at renesas.com>
[Sergei: added pin node and prop, moved device node, fixed summary, supplemented
changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov at cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas at verge.net.au>
---
arch/arm/boot/dts/r8a7790-lager.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index d869f2a..830f2e8 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -268,6 +268,11 @@
renesas,function = "iic3";
};
+ hsusb_pins: hsusb {
+ renesas,groups = "usb0_ovc_vbus";
+ renesas,function = "usb0";
+ };
+
usb0_pins: usb0 {
renesas,groups = "usb0";
renesas,function = "usb0";
@@ -478,6 +483,13 @@
pinctrl-names = "default";
};
+&hsusb {
+ status = "okay";
+ pinctrl-0 = <&hsusb_pins>;
+ pinctrl-names = "default";
+ renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+};
+
&usbphy {
status = "okay";
};
--
2.1.1
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