[PATCH v2 03/18] PCI: designware: Configuration space should be specified in 'reg'

[Kumar Gala]

On May 29, 2014, at 10:18 AM, Liviu Dudau <liviu at dudau.co.uk> wrote:

> On Thu, May 29, 2014 at 10:03:54AM -0500, Kumar Gala wrote:
>> 
>> On May 29, 2014, at 1:38 AM, Kishon Vijay Abraham I <kishon at ti.com> wrote:
>> 
>>> The configuration address space has so far been specified in *ranges*,
>>> however it should be specified in *reg* making it a platform MEM resource.
>>> Hence used 'platform_get_resource_*' API to get configuration address
>>> space in the designware driver.
>>> 
>>> Cc: Jason Gunthorpe <jgunthorpe at obsidianresearch.com>
>>> Cc: Bjorn Helgaas <bhelgaas at google.com>
>>> Cc: Mohit Kumar <mohit.kumar at st.com>
>>> Cc: Jingoo Han <jg1.han at samsung.com>
>>> Cc: Marek Vasut <marex at denx.de>
>>> Cc: Arnd Bergmann <arnd at arndb.de>
>>> Signed-off-by: Kishon Vijay Abraham I <kishon at ti.com>
>>> ---
>>> .../devicetree/bindings/pci/designware-pcie.txt    |    1 +
>>> drivers/pci/host/pcie-designware.c                 |   17 +++++++++++++++--
>>> 2 files changed, 16 insertions(+), 2 deletions(-)
>> 
>> Why should the cfg space be defined in *reg* instead of ranges?
> 
> Because what you end up using is a struct resource to represent the cfg space and
> the conversion between ranges and resources breaks down for CFG space (we don't
> have a flag in the resource flags to say this is CFG resource). Specifying it
> as a *reg* property makes it a MEM resource and no special casing is needed.
> 
> Best regards,
> Liviu

Just because the kernel doesn’t handle this is NO reason to change the way the DT works.

We are probably better of changing of_bus_pci_get_flags() to set IORESOURCE_MEM for cfg type.  Will send a patch for this.

- k

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