[PATCH 01/10] dt/bindings: add passthru-mask property to versatile-fpga-irq

[Rob Herring]

On Fri, May 23, 2014 at 7:46 AM, Linus Walleij <linus.walleij at linaro.org> wrote:
> On Tue, May 20, 2014 at 11:09 PM, Rob Herring <robherring2 at gmail.com> wrote:
>
>> From: Rob Herring <robh at kernel.org>
>>
>> Add a passthru-mask property for setting interrupts which are passed
>> through directly to a primary controller.
>>
>> Signed-off-by: Rob Herring <robh at kernel.org>
>> Cc: Pawel Moll <pawel.moll at arm.com>
>> Cc: Mark Rutland <mark.rutland at arm.com>
>> Cc: Ian Campbell <ijc+devicetree at hellion.org.uk>
>> Cc: Kumar Gala <galak at codeaurora.org>
>> ---
>>  Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
>> index c9cf605..956b71d 100644
>> --- a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
>> +++ b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
>> @@ -34,3 +34,6 @@ Optional properties:
>>  - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
>>    output is simply connected to the input of another IRQ controller,
>>    then the parent IRQ shall be specified in this property.
>> +- passthru-mask: a u32 number representing a bit mas determining which of
>
> bit mask
>
> (speling)
>
>> +  the interrupts are directly passed through to the primary interrupt
>> +  controller.
>
> This is very confusing on the Integrators. The FPGA IRQ controller
> *is* the primary interrupt controller on these.

Yes. Really, the h/w is not the same and we should have different
compatible strings. Unfortunately, it is Integrator that should
change.

>
> (Further on Integrators with an IM-PD1 expansion board the
> VIC is actually the secondary controller visavis the FPGA
> IRQ controller which is the primary one.)
>
> So on the versatile the FPGA IRQ controller is *not* cascaded
> off one line of the VIC but rather connected in parallel or
> something?

See figure in 3.10 of the user guide:

http://infocenter.arm.com/help/topic/com.arm.doc.dui0225d/DUI0225D_versatile_application_baseboard_arm926ej_s_ug.pdf

It is both chained and direct connection. I guess we could just use
chained mode to simplify things.

> Care to elaborate a bit on how things are cascaded here?
> And specify that this is for some special usecase or
> something?

I'll add a reference to the user guide to the binding.

Rob