[PATCH 0/3] ARM: OMAP5+: Support Duty Cycle Correction(DCC)
nm at ti.com
Fri May 16 03:45:57 PDT 2014
This patch series has been carried over in vendor kernel for quiet
few years now.
Unfortunately, it was very recently re-discovered and upstream kernel
is noticed to be broken for OMAP5 1.5GHz - at least we are operating
DPLL at frequency higher than what it was intended to be when CPUFreq
is enabled. Thankfully, with nominal voltage(we dont use AVS yet in
upstream for the mentioned platforms) and margins in trimming, we
have so far not crashed - but I strongly suspect this might be some
boundary case survival.
Verified on the following impacted platforms using 3.15-rc4 based
DRA72x: http://slexy.org/view/s2TXtSa6mH (refused to lock)
DRA72x: http://slexy.org/view/s2hwsvGLmC (locks properly)
Hopefully, we can get these into some kernel revision in some form.
NOTE: Support for 4470(which is the only other platform requiring
DCC) is not present in upstream kernel and there are no plans to
support that SoC, even if it is added at a later point, support can be
extended as needed.
Series based on v3.15-rc5 tag.
Also available on my tree:
3.15-rc4 based kernel - DRA75x-evm, 72x-evm, OMAP5uevm
3.15-rc5 - OMAP5uEVM(only one supporting 1.5GHz atm)
Andrii Tseglytskyi (1):
ARM: OMAP5+: dpll: support Duty Cycle Correction(DCC)
Nishanth Menon (2):
clk: dpll: support OMAP5 MPU DPLL that need special handling for
ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing
with higher frequencies
.../devicetree/bindings/clock/ti/dpll.txt | 1 +
arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +-
arch/arm/boot/dts/omap54xx-clocks.dtsi | 2 +-
arch/arm/mach-omap2/dpll3xxx.c | 9 +++++++++
drivers/clk/ti/dpll.c | 21 ++++++++++++++++++++
include/linux/clk/ti.h | 4 ++++
6 files changed, 37 insertions(+), 2 deletions(-)
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