[PATCH 1/2] gpio: omap: prepare and unprepare the debounce clock
Rajendra Nayak
rnayak at ti.com
Thu May 8 00:06:22 PDT 2014
On Wednesday 23 April 2014 11:41 AM, Rajendra Nayak wrote:
> Replace the clk_enable()s with a clk_prepare_enable() and
> the clk_disables()s with a clk_disable_unprepare()
>
> This never showed issues due to the OMAP platform code (hwmod)
> leaving these clocks in clk_prepare()ed state by default.
>
> Reported-by: Kishon Vijay Abraham I <kishon at ti.com>
> Signed-off-by: Rajendra Nayak <rnayak at ti.com>
> Cc: linux-gpio at vger.kernel.org
> Cc: Santosh Shilimkar <santosh.shilimkar at ti.com>
> Cc: Kevin Hilman <khilman at deeprootsystems.com>
Linus,
Do you mind picking this fix up via the GPIO tree? Alternatively you could
Ack this if you are fine and we can take both Patch 1/2 and Patch 2/2 from this
series via the OMAP tree.
Patch 2/2 has a dependency on Patch 1/2 and they need to go in in that order else
gpio would break. More discussions are here [1].
Let us know what you think. Thanks.
regards,
Rajendra
[1] http://www.mail-archive.com/linux-gpio@vger.kernel.org/msg02801.html
> ---
> drivers/gpio/gpio-omap.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
> index 19b886c..78bc5a4 100644
> --- a/drivers/gpio/gpio-omap.c
> +++ b/drivers/gpio/gpio-omap.c
> @@ -180,7 +180,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
> static inline void _gpio_dbck_enable(struct gpio_bank *bank)
> {
> if (bank->dbck_enable_mask && !bank->dbck_enabled) {
> - clk_enable(bank->dbck);
> + clk_prepare_enable(bank->dbck);
> bank->dbck_enabled = true;
>
> writel_relaxed(bank->dbck_enable_mask,
> @@ -198,7 +198,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank)
> */
> writel_relaxed(0, bank->base + bank->regs->debounce_en);
>
> - clk_disable(bank->dbck);
> + clk_disable_unprepare(bank->dbck);
> bank->dbck_enabled = false;
> }
> }
> @@ -231,7 +231,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
>
> l = GPIO_BIT(bank, gpio);
>
> - clk_enable(bank->dbck);
> + clk_prepare_enable(bank->dbck);
> reg = bank->base + bank->regs->debounce;
> writel_relaxed(debounce, reg);
>
> @@ -245,7 +245,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
> bank->dbck_enable_mask = val;
>
> writel_relaxed(val, reg);
> - clk_disable(bank->dbck);
> + clk_disable_unprepare(bank->dbck);
> /*
> * Enable debounce clock per module.
> * This call is mandatory because in omap_gpio_request() when
> @@ -290,7 +290,7 @@ static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
> bank->context.debounce = 0;
> writel_relaxed(bank->context.debounce, bank->base +
> bank->regs->debounce);
> - clk_disable(bank->dbck);
> + clk_disable_unprepare(bank->dbck);
> bank->dbck_enabled = false;
> }
> }
>
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