[PATCH 39/55] ARM: OMAP5: PRM: remove direct register declaration macros
Tero Kristo
t-kristo at ti.com
Mon Mar 31 11:16:18 EDT 2014
None of these are currently used, so cleanup.
Signed-off-by: Tero Kristo <t-kristo at ti.com>
---
arch/arm/mach-omap2/prm54xx.h | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/arch/arm/mach-omap2/prm54xx.h b/arch/arm/mach-omap2/prm54xx.h
index e441101..3f1b383 100644
--- a/arch/arm/mach-omap2/prm54xx.h
+++ b/arch/arm/mach-omap2/prm54xx.h
@@ -69,7 +69,6 @@
#define OMAP54XX_PRM_IRQSTATUS_DSP_OFFSET 0x0030
#define OMAP54XX_PRM_IRQENABLE_DSP_OFFSET 0x0038
#define OMAP54XX_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040
-#define OMAP54XX_CM_PRM_PROFILING_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_OCP_SOCKET_INST, 0x0040)
#define OMAP54XX_PRM_DEBUG_OUT_OFFSET 0x0084
#define OMAP54XX_PRM_DEBUG_TRANS_CFG_OFFSET 0x0090
#define OMAP54XX_PRM_DEBUG_OFF_TRANS_OFFSET 0x0094
@@ -80,13 +79,9 @@
/* PRM.CKGEN_PRM register offsets */
#define OMAP54XX_CM_CLKSEL_ABE_DSS_SYS_OFFSET 0x0000
-#define OMAP54XX_CM_CLKSEL_ABE_DSS_SYS OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_CKGEN_INST, 0x0000)
#define OMAP54XX_CM_CLKSEL_WKUPAON_OFFSET 0x0008
-#define OMAP54XX_CM_CLKSEL_WKUPAON OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_CKGEN_INST, 0x0008)
#define OMAP54XX_CM_CLKSEL_ABE_PLL_REF_OFFSET 0x000c
-#define OMAP54XX_CM_CLKSEL_ABE_PLL_REF OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_CKGEN_INST, 0x000c)
#define OMAP54XX_CM_CLKSEL_SYS_OFFSET 0x0010
-#define OMAP54XX_CM_CLKSEL_SYS OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_CKGEN_INST, 0x0010)
/* PRM.MPU_PRM register offsets */
#define OMAP54XX_PM_MPU_PWRSTCTRL_OFFSET 0x0000
@@ -314,27 +309,16 @@
/* PRM.WKUPAON_CM register offsets */
#define OMAP54XX_CM_WKUPAON_CLKSTCTRL_OFFSET 0x0000
#define OMAP54XX_CM_WKUPAON_L4_WKUP_CLKCTRL_OFFSET 0x0020
-#define OMAP54XX_CM_WKUPAON_L4_WKUP_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0020)
#define OMAP54XX_CM_WKUPAON_WD_TIMER1_CLKCTRL_OFFSET 0x0028
-#define OMAP54XX_CM_WKUPAON_WD_TIMER1_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0028)
#define OMAP54XX_CM_WKUPAON_WD_TIMER2_CLKCTRL_OFFSET 0x0030
-#define OMAP54XX_CM_WKUPAON_WD_TIMER2_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0030)
#define OMAP54XX_CM_WKUPAON_GPIO1_CLKCTRL_OFFSET 0x0038
-#define OMAP54XX_CM_WKUPAON_GPIO1_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0038)
#define OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET 0x0040
-#define OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0040)
#define OMAP54XX_CM_WKUPAON_TIMER12_CLKCTRL_OFFSET 0x0048
-#define OMAP54XX_CM_WKUPAON_TIMER12_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0048)
#define OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET 0x0050
-#define OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0050)
#define OMAP54XX_CM_WKUPAON_SAR_RAM_CLKCTRL_OFFSET 0x0060
-#define OMAP54XX_CM_WKUPAON_SAR_RAM_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0060)
#define OMAP54XX_CM_WKUPAON_KBD_CLKCTRL_OFFSET 0x0078
-#define OMAP54XX_CM_WKUPAON_KBD_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0078)
#define OMAP54XX_CM_WKUPAON_SCRM_CLKCTRL_OFFSET 0x0090
-#define OMAP54XX_CM_WKUPAON_SCRM_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0090)
#define OMAP54XX_CM_WKUPAON_IO_SRCOMP_CLKCTRL_OFFSET 0x0098
-#define OMAP54XX_CM_WKUPAON_IO_SRCOMP_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_WKUPAON_CM_INST, 0x0098)
/* PRM.EMU_PRM register offsets */
#define OMAP54XX_PM_EMU_PWRSTCTRL_OFFSET 0x0000
@@ -345,9 +329,7 @@
#define OMAP54XX_CM_EMU_CLKSTCTRL_OFFSET 0x0000
#define OMAP54XX_CM_EMU_DYNAMICDEP_OFFSET 0x0008
#define OMAP54XX_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020
-#define OMAP54XX_CM_EMU_DEBUGSS_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_EMU_CM_INST, 0x0020)
#define OMAP54XX_CM_EMU_MPU_EMU_DBG_CLKCTRL_OFFSET 0x0028
-#define OMAP54XX_CM_EMU_MPU_EMU_DBG_CLKCTRL OMAP54XX_PRM_REGADDR(OMAP54XX_PRM_EMU_CM_INST, 0x0028)
/* PRM.DEVICE_PRM register offsets */
#define OMAP54XX_PRM_RSTCTRL_OFFSET 0x0000
--
1.7.9.5
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