disabling MMU of ARMv7-A

[Catalin Marinas]

On Fri, Mar 28, 2014 at 07:23:45AM +0000, Marc C wrote:
> > However, ARMv7-A/R doesn't have such register. They can only control whether
> > use _HIGH_ vector or no
> 
> Not entirely accurate. ARMv7-A, and the Cortex-A9, specify the Vector
> Base Address
> Register, or VBAR [1].

Good point, I missed this. It only works if SCTLR.V is 0 (so low
vectors).

-- 
Catalin