[PATCH v6 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller

[Thomas Gleixner]

On Sat, 15 Mar 2014, Carlo Caione wrote:

> Allwinner A20/A31 SoCs have a special interrupt controller for managing NMI.
> Three register are present to (un)mask, control and acknowledge NMI.
> These two patches add a new irqchip driver in cascade with GIC.

If I get an ack for the DT parts, I'll pick it up.