[PATCH v11 15/27] iommu/exynos: use convenient macro to handle gate clocks
Tomasz Figa
t.figa at samsung.com
Fri Mar 14 09:43:42 EDT 2014
Hi KyongHo,
On 14.03.2014 06:09, Cho KyongHo wrote:
> exynos-iommu driver must care about master H/W's gate clock as well as
> System MMU's gate clock. To enhance readability of the source code,
> macros to gate/ungate those clocks are defined.
>
> Signed-off-by: Cho KyongHo <pullip.cho at samsung.com>
> ---
> drivers/iommu/exynos-iommu.c | 34 ++++++++++++++++++++++------------
> 1 file changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> index 71e77f1..cef62d0 100644
> --- a/drivers/iommu/exynos-iommu.c
> +++ b/drivers/iommu/exynos-iommu.c
> @@ -101,6 +101,16 @@
> #define REG_PB1_SADDR 0x054
> #define REG_PB1_EADDR 0x058
>
> +#define __clk_gate_ctrl(data, clk, en) do { \
> + if (data->clk) \
> + clk_##en##able(data->clk); \
> + } while (0)
> +
> +#define __sysmmu_clk_enable(data) __clk_gate_ctrl(data, clk, en)
> +#define __sysmmu_clk_disable(data) __clk_gate_ctrl(data, clk, dis)
> +#define __master_clk_enable(data) __clk_gate_ctrl(data, clk_master, en)
> +#define __master_clk_disable(data) __clk_gate_ctrl(data, clk_master, dis)
> +
I'd say that such macros only obfuscate code, without any gains, as you
can see in diffstat - this patch adds more lines than it removes.
Please drop this change.
Best regards,
Tomasz
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