[PATCH v5 2/2] ARM: shmobile: lager: enable internal PCI
Sergei Shtylyov
sergei.shtylyov at cogentembedded.com
Tue Jun 24 11:02:21 PDT 2014
From: Ben Dooks <ben.dooks at codethink.co.uk>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to
them.
Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton at codethink.co.uk>
[Sergei: enabled PCI0]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov at cogentembedded.com>
---
Changes in version 4:
- refreshed the patch.
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- enabled PCI0 device;
- reworded summary and changelog;
- refreshed the patch.
arch/arm/boot/dts/r8a7790-lager.dts | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7790-lager.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7790-lager.dts
+++ renesas/arch/arm/boot/dts/r8a7790-lager.dts
@@ -219,6 +219,21 @@
renesas,groups = "i2c3";
renesas,function = "i2c3";
};
+
+ usb0_pins: usb0 {
+ renesas,groups = "usb0";
+ renesas,function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ renesas,groups = "usb1";
+ renesas,function = "usb1";
+ };
+
+ usb2_pins: usb2 {
+ renesas,groups = "usb2";
+ renesas,function = "usb2";
+ };
};
ðer {
@@ -368,3 +383,21 @@
regulator-always-on;
};
};
+
+&pci0 {
+ status = "okay";
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+};
+
+&pci1 {
+ status = "okay";
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+};
+
+&pci2 {
+ status = "okay";
+ pinctrl-0 = <&usb2_pins>;
+ pinctrl-names = "default";
+};
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