[PATCH v2 1/8] PCI: designware: add rd[wr]_other_conf API

Murali Karicheri m-karicheri2 at ti.com
Tue Jun 10 11:51:20 PDT 2014


v3.65 version of the designware h/w, requires application space
registers to be configured to access the remote EP config space.
To support this, add rd[wr]_other_conf API in the pcie_host_opts

Signed-off-by: Murali Karicheri <m-karicheri2 at ti.com>

CC: Santosh Shilimkar <santosh.shilimkar at ti.com>
CC: Russell King <linux at arm.linux.org.uk>
CC: Grant Likely <grant.likely at linaro.org>
CC: Rob Herring <robh+dt at kernel.org>
CC: Mohit Kumar <mohit.kumar at st.com>
CC: Jingoo Han <jg1.han at samsung.com>
CC: Bjorn Helgaas <bhelgaas at google.com>
CC: Pratyush Anand <pratyush.anand at st.com>
CC: Richard Zhu <r65037 at freescale.com>
CC: Kishon Vijay Abraham I <kishon at ti.com>
CC: Marek Vasut <marex at denx.de>
CC: Arnd Bergmann <arnd at arndb.de>
CC: Pawel Moll <pawel.moll at arm.com>
CC: Mark Rutland <mark.rutland at arm.com>
CC: Ian Campbell <ijc+devicetree at hellion.org.uk>
CC: Kumar Gala <galak at codeaurora.org>
CC: Randy Dunlap <rdunlap at infradead.org>
CC: Grant Likely <grant.likely at linaro.org> 

---
 drivers/pci/host/pcie-designware.c |   12 ++++++++++--
 drivers/pci/host/pcie-designware.h |    4 ++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index c4e3732..e8f5d8d 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -654,7 +654,11 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
 
 	spin_lock_irqsave(&pp->conf_lock, flags);
 	if (bus->number != pp->root_bus_nr)
-		ret = dw_pcie_rd_other_conf(pp, bus, devfn,
+		if (pp->ops->rd_other_conf)
+			ret = pp->ops->rd_other_conf(pp, bus, devfn,
+						where, size, val);
+		else
+			ret = dw_pcie_rd_other_conf(pp, bus, devfn,
 						where, size, val);
 	else
 		ret = dw_pcie_rd_own_conf(pp, where, size, val);
@@ -680,7 +684,11 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 
 	spin_lock_irqsave(&pp->conf_lock, flags);
 	if (bus->number != pp->root_bus_nr)
-		ret = dw_pcie_wr_other_conf(pp, bus, devfn,
+		if (pp->ops->wr_other_conf)
+			ret = pp->ops->wr_other_conf(pp, bus, devfn,
+						where, size, val);
+		else
+			ret = dw_pcie_wr_other_conf(pp, bus, devfn,
 						where, size, val);
 	else
 		ret = dw_pcie_wr_own_conf(pp, where, size, val);
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index 3063b35..2d6dd66 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -62,6 +62,10 @@ struct pcie_host_ops {
 			u32 val, void __iomem *dbi_base);
 	int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
 	int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val);
+	int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
+			unsigned int devfn, int where, int size, u32 *val);
+	int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
+			unsigned int devfn, int where, int size, u32 val);
 	int (*link_up)(struct pcie_port *pp);
 	void (*host_init)(struct pcie_port *pp);
 };
-- 
1.7.9.5




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