[PATCH 00/14] irqchip: crossbar: driver fixes
Sricharan R
r.sricharan at ti.com
Tue Jun 3 00:42:52 PDT 2014
This series does some cleanup and provides support for
hardwired IRQ and crossbar definitions.
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10,
131, 132, 133 are direct wired to hardware blocks bypassing
crossbar. This quirky implementation is *NOT* supposed to be the
expectation of crossbar hardware usage. This series adds support
to represent such hard-wired irqs through DT and avoid generic
allocation/programming of crossbar in the driver.
This way of supporting hard-wired irqs was a result of
the below discussions.
http://www.spinics.net/lists/arm-kernel/msg329946.html
Based on linux-next next-20140602 tag + Tony's omap-for-v3.16/crossbar branch.
The patches are available here
git at github.com:Sricharanti/sricharan.git crossbar_updates
Nishanth Menon (11):
irqchip: crossbar: remove IS_ERR_VALUE check
irqchip: crossbar: fix sparse warnings
irqchip: crossbar: fix checkpatch warning
irqchip: crossbar: fix kerneldoc warning
irqchip: crossbar: fix memory leak incase of invalid entry
irqchip: crossbar: return proper error value
irqchip: crossbar: change the goto naming
irqchip: crossbar: introduce ti,max-crossbar-sources to identify
valid crossbar mapping
irqchip: crossbar: introduce centralized check for crossbar write
Documentation: dt: OMAP: crossbar: add description for interrupt
consumer
irqchip: crossbar allow for quirky hardware with direct hardwiring of
GIC
Rajendra Nayak (1):
irqchip: crossbar: DRA7: Fix unused crossbar list
Sricharan R (2):
irqchip: crossbar: set cb pointer to null in case of error
irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
.../devicetree/bindings/arm/omap/crossbar.txt | 27 +++++
drivers/irqchip/irq-crossbar.c | 127 +++++++++++++++-----
2 files changed, 125 insertions(+), 29 deletions(-)
--
1.7.9.5
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