[PATCH 1/4] clk: rockchip: protect critical clocks from getting disabled

[Mike Turquette]

Quoting Heiko Stuebner (2014-07-29 12:12:05)
> The clock-tree contains clocks that should never get disabled automatically.
> One example are the base ACLKs, the base supplies for all peripherals.
> 
> Therefore add a structure similar to the sunxi clock-tree to protect these
> special clocks from being disabled.
> 
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> ---
>  drivers/clk/rockchip/clk-rk3188.c |  7 +++++++
>  drivers/clk/rockchip/clk-rk3288.c |  7 +++++++
>  drivers/clk/rockchip/clk.c        | 13 +++++++++++++
>  drivers/clk/rockchip/clk.h        |  1 +
>  4 files changed, 28 insertions(+)
> 
> diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
> index a83a6d8..5aef277 100644
> --- a/drivers/clk/rockchip/clk-rk3188.c
> +++ b/drivers/clk/rockchip/clk-rk3188.c
> @@ -599,6 +599,11 @@ static struct rockchip_clk_branch rk3188_clk_branches[] __initdata = {
>         GATE(ACLK_GPS, "aclk_gps", "aclk_peri", 0, RK2928_CLKGATE_CON(8), 13, GFLAGS),
>  };
>  
> +static const char *rk3188_critical_clocks[] __initconst = {
> +       "aclk_cpu",
> +       "aclk_peri",

I'm not against the idea of critical clocks, but I want to verify that
there is no other driver out there that is a better fit for claiming
these clks via clk_get and enabling them the normal way via clk_enable?

Regards,
Mike

> +};
> +
>  static void __init rk3188_common_clk_init(struct device_node *np)
>  {
>         void __iomem *reg_base;
> @@ -628,6 +633,8 @@ static void __init rk3188_common_clk_init(struct device_node *np)
>                                    RK3188_GRF_SOC_STATUS);
>         rockchip_clk_register_branches(common_clk_branches,
>                                   ARRAY_SIZE(common_clk_branches));
> +       rockchip_clk_protect_critical(rk3188_critical_clocks,
> +                                     ARRAY_SIZE(rk3188_critical_clocks));
>  
>         rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
>                                   ROCKCHIP_SOFTRST_HIWORD_MASK);
> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> index 0d8c6c5..6c6f954 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -680,6 +680,11 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>         GATE(0, "pclk_isp_in", "ext_isp", 0, RK3288_CLKGATE_CON(16), 3, GFLAGS),
>  };
>  
> +static const char *rk3288_critical_clocks[] __initconst = {
> +       "aclk_cpu",
> +       "aclk_peri",
> +};
> +
>  static void __init rk3288_clk_init(struct device_node *np)
>  {
>         void __iomem *reg_base;
> @@ -710,6 +715,8 @@ static void __init rk3288_clk_init(struct device_node *np)
>                                    RK3288_GRF_SOC_STATUS);
>         rockchip_clk_register_branches(rk3288_clk_branches,
>                                   ARRAY_SIZE(rk3288_clk_branches));
> +       rockchip_clk_protect_critical(rk3288_critical_clocks,
> +                                     ARRAY_SIZE(rk3288_critical_clocks));
>  
>         rockchip_register_softrst(np, 9, reg_base + RK3288_SOFTRST_CON(0),
>                                   ROCKCHIP_SOFTRST_HIWORD_MASK);
> diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
> index 278cf9d..9189f1b 100644
> --- a/drivers/clk/rockchip/clk.c
> +++ b/drivers/clk/rockchip/clk.c
> @@ -242,3 +242,16 @@ void __init rockchip_clk_register_branches(
>                 rockchip_clk_add_lookup(clk, list->id);
>         }
>  }
> +
> +void __init rockchip_clk_protect_critical(const char *clocks[], int nclocks)
> +{
> +       int i;
> +
> +       /* Protect the clocks that needs to stay on */
> +       for (i = 0; i < nclocks; i++) {
> +               struct clk *clk = __clk_lookup(clocks[i]);
> +
> +               if (clk)
> +                       clk_prepare_enable(clk);
> +       }
> +}
> diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
> index 887cbde..2b0bca1 100644
> --- a/drivers/clk/rockchip/clk.h
> +++ b/drivers/clk/rockchip/clk.h
> @@ -329,6 +329,7 @@ void rockchip_clk_register_branches(struct rockchip_clk_branch *clk_list,
>                                     unsigned int nr_clk);
>  void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list,
>                                 unsigned int nr_pll, int grf_lock_offset);
> +void rockchip_clk_protect_critical(const char *clocks[], int nclocks);
>  
>  #define ROCKCHIP_SOFTRST_HIWORD_MASK   BIT(0)
>  
> -- 
> 2.0.1
>