[RFC] ARM: Enable dynamic clock gating?

Sören Brinkmann soren.brinkmann at xilinx.com
Thu Jul 31 08:17:52 PDT 2014


On Thu, 2014-07-31 at 04:15PM +0100, Will Deacon wrote:
> On Thu, Jul 31, 2014 at 03:24:17PM +0100, Sören Brinkmann wrote:
> > Hi all,
> > 
> > similar to the patch enabling the SCU standby mode
> > (https://lkml.org/lkml/2014/7/30/122), I have a patch to enable the A9's
> > 'dynamic clock gating'
> > (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388f/CIHBGEHE.html)
> > in platform code. This might also be a candidate to enable in common
> > code.
> > Do you think that would make sense?
> > I tried to find the right place to add this and was looking at
> > mm/proc-v7.S. It probably works to put it there, but does not really
> > seem to be the right place.
> > 
> > As reference, this is what I currently have as part of platform code:
> >   /* A9 clock gating */
> >   asm volatile ("mrc  p15, 0, r12, c15, c0, 0\n"
> >                 "orr  r12, r12, #1\n"
> >                 "mcr  p15, 0, r12, c15, c0, 0\n"
> >                 : /* no outputs */
> >                 : /* no inputs */
> >                 : "r12");
> 
> This should *really* be done by firmware.

Zynq doesn't have firmware, so we'd put it in platform code I guess.
Is this so different compared to the SCU standby mode?

	Thanks,
	Sören




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